Transistors such as metal oxide semiconductor field effect transistors (MOSFETs) or simply field effect transistors (FETs) or MOS transistors are the core building blocks of the vast majority of semiconductor integrated circuits (ICs). A FET includes source and drain regions between which a current can flow through a channel under the influence of a bias applied to a gate electrode that overlies the channel. The ICs are usually formed using both P-channel FETs (PMOS transistors or PFETs) and N-channel FETs (NMOS transistors or NFETs) and the IC is then referred to as a complementary MOS or CMOS circuit. Some semiconductor ICs, such as high performance microprocessors, can include millions of FETs. For such ICs, decreasing transistor size and thus increasing transistor density has traditionally been a high priority in the semiconductor manufacturing industry. Transistor performance, however, must be maintained even as the transistor size decreases.
In some integrated circuit designs there has been a desire to eliminate the use of polysilicon gate electrodes to improve device performance with decreased feature sizes. Replacing polysilicon gate structures with metal gate structures is one solution. Often, metal gate structures utilize tungsten as a metal fill portion in conjunction with a titanium nitride (TiN) P-type work function metal layer, and/or tantalum carbide (TaC) or titanium carbide (TiC) for N-type work function metal layer. The tungsten metal fill portion is used as a conductive metal fill to offset the relatively higher resistance of the work function metal layer(s), particularly TaC or TiC for N-type work function metal, to lower the overall resistance of the metal gate structure. Typically, the TiN work function metal layer and the TiC or TaC work function metal layer are deposited in trenches with high-k dielectric and barrier layers and a first recessing process is used to etch back the layers and form first recesses (e.g., recessed areas) in the trenches. The first recesses are filled with tungsten with TiN wetting layer to form the metal gate structures. Using a second recessing process, second recesses are formed in the trenches above the metal gate structures for receiving a passivation layer-forming material. However, the use of numerous layers and multiple recessing processes to form the metal gate structures present several technical challenges in smaller technology features. For example, as the gate lengths decrease so do the sizes of the trenches. Multiple depositions and recessing of the work function metal layers and the conductive metal fill in the smaller trenches becomes increasingly difficult to control, resulting in increased variability, leakage, and Vt shift.
Accordingly, it is desirable to provide methods for fabricating integrated circuits having improved metal gate structures. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.